My best guess to the 21 bit question is the utilization of the DAC chips in a balanced pair per channel configuration. Not that in any way changes the chips ability to process the data, but possibly lowers its noise floor to a degree in which they decided to market it with that level of performance, but not purely technical aspect of capability.
From what I have read about the AD5791 in use, its an extremely linear performing R2R solution accomplished by using thin film resistor matching, then placed in pairs to provide its performance in a compact and simple to implement package. It also exhibits little drift in variable temperature ranges. Other R2R products that have been shown in the market are utilizing FPGA processors running code that corrects the linearity issues of ladder dac in use. So as long as the linearity drift remains within a range, they can identify the error and correct for it digitally before it reaches the next stage. Obviously a lot larger and may not be as stable as the AD5791 in stability.
From what I have read about the AD5791 in use, its an extremely linear performing R2R solution accomplished by using thin film resistor matching, then placed in pairs to provide its performance in a compact and simple to implement package. It also exhibits little drift in variable temperature ranges. Other R2R products that have been shown in the market are utilizing FPGA processors running code that corrects the linearity issues of ladder dac in use. So as long as the linearity drift remains within a range, they can identify the error and correct for it digitally before it reaches the next stage. Obviously a lot larger and may not be as stable as the AD5791 in stability.