Mceljo, with all due respect your friend seems to have missed my point.
My point was NOT that bit errors would occur in the link between transport and dac, due to logic threshold problems or due to any other reason. I would expect that any such interface that is not defective, and that is Walmart quality or better, will provide 100% accuracy in conveying the 1's and 0's from one component to the other.
My point in mentioning the logic threshold of the receiver chip was that variations in its exact value, within normally expectable tolerances, may affect whether or not the receiver chip responds to reflection-induced distortion that may be present on the edges of the incoming signal waveform. (By "edges" I mean the transitions from the 0 state to the 1 state, and from the 1 state to the 0 state). And thereby affect the TIMING of the conversion of each sample to analog.
Signal reflections caused by impedance mismatches, as I explained and as the article describes, will propagate from the dac input circuit back to the transport output, and then partially re-reflect back to the dac input, where whatever fraction of the re-reflection that is not reflected once again will sum together with the original waveform.
If the cable length is such that the time required for that round trip results in the re-reflection returning to the dac input when the original waveform is at or near the mid-point of a transition between 0 and 1 or 1 and 0, since the receiver's logic threshold is likely to be somewhere around that mid-point the result will be increased jitter.
Again, no one is claiming that bits are not received by the dac with 100% accuracy. The claim is that the TIMING of the conversion of each sample to analog will randomly fluctuate. The degree of that fluctuation will be small, and will be a function of the many factors I mentioned (and no doubt others as well), but there seems to be wide acceptance across both the objectivist and the subjectivist constituents of the audiophile spectrum that jitter effects can be audibly significant.
If your friend disagrees with that, he should keep in mind two key facts, which he may not realize:
1)The S/PDIF and AES/EBU interfaces we are discussing convey both clock and data together, multiplexed (i.e., combined) into a single signal.
2)The timing of each of the 44,100 conversions that are performed each second by the dac is determined by the clock that is extracted from that interface signal.
Best regards,
-- Al
My point was NOT that bit errors would occur in the link between transport and dac, due to logic threshold problems or due to any other reason. I would expect that any such interface that is not defective, and that is Walmart quality or better, will provide 100% accuracy in conveying the 1's and 0's from one component to the other.
My point in mentioning the logic threshold of the receiver chip was that variations in its exact value, within normally expectable tolerances, may affect whether or not the receiver chip responds to reflection-induced distortion that may be present on the edges of the incoming signal waveform. (By "edges" I mean the transitions from the 0 state to the 1 state, and from the 1 state to the 0 state). And thereby affect the TIMING of the conversion of each sample to analog.
Signal reflections caused by impedance mismatches, as I explained and as the article describes, will propagate from the dac input circuit back to the transport output, and then partially re-reflect back to the dac input, where whatever fraction of the re-reflection that is not reflected once again will sum together with the original waveform.
If the cable length is such that the time required for that round trip results in the re-reflection returning to the dac input when the original waveform is at or near the mid-point of a transition between 0 and 1 or 1 and 0, since the receiver's logic threshold is likely to be somewhere around that mid-point the result will be increased jitter.
Again, no one is claiming that bits are not received by the dac with 100% accuracy. The claim is that the TIMING of the conversion of each sample to analog will randomly fluctuate. The degree of that fluctuation will be small, and will be a function of the many factors I mentioned (and no doubt others as well), but there seems to be wide acceptance across both the objectivist and the subjectivist constituents of the audiophile spectrum that jitter effects can be audibly significant.
If your friend disagrees with that, he should keep in mind two key facts, which he may not realize:
1)The S/PDIF and AES/EBU interfaces we are discussing convey both clock and data together, multiplexed (i.e., combined) into a single signal.
2)The timing of each of the 44,100 conversions that are performed each second by the dac is determined by the clock that is extracted from that interface signal.
Best regards,
-- Al