How do you know that it matters with most DACs?
I modded many DACs for 10 years, I have played with customers DACs and I have heard many DACs at trade shows for 15 years.
So are you saying that DACs that are immune to incoming jitter are not good sounding? And further, the reason they are not good sounding is because of the DACs reclocking?
This is my experience. With the Sabre D/A's for instance, it usually sounds better if you can avoid the reclocking by bypassing it. The reason for this is simple: most internal reclocking implementations are not that low in jitter. Not the 10-15psec like you can get with a free-running clock.
You are correct however, that many DACs use reclocking of some sort internally so that the source jitter is less important. The problem is that most of the reclockers use PLL to synchronize to the incoming stream. A PLL clock can NEVER have the low jitter possible with a free-running clock.
Another method is to re-sample the data. After using many upsampling chips over the years, I discovered that only one of them is good enough to deliver low jitter, and I use that one in my Synchro-Mesh. Then there is the clock quality, clock power delivery and implementation which all affect the jitter. The clock quality, implementation and power delivery may be very good in a Vivaldi DAC, but probably not that great in a $3K DAC.
There are a few examples where there is a possibility that an internal clock could be good enough in a reclocker to delivery really low jitter. In these cases, they use a "bang-bang" type of clocking where the clock is actually free-running, but it switches between a slightly higher frequency clock and a slightly lower frequency clock in order to "bracket" the incoming frequency. The data is buffered in a FIFO and the frequency changes prevent overrun and underrun. The change between these two frequencies may happen every few seconds. In order to achieve really low jitter, the circuit would need 12 custom oscillators for the 6 sample-rates. Each of these would have to be slightly higher or lower than the nominal frequency. Each of these would need to be low-jitter oscillators with independent power regulation. This is certainly possible, but I'm not aware of any DAC on the planet that uses this scheme. It would be very expensive. I implemented a circuit like this in a product I called the "Pace-Car", which is obsolete now. Rather than using 12 oscillators, I used two and "pulled" their frequency slightly from the nominal. It was good, but pulling the frequency from it's nominal to be slightly higher and lower is not optimum and probably adds jitter.
Steve N.
Empirical Audio
