Schiit Yggdrasil -- 21 bit?

@shadorne 

Sorry, I am out of my depth here. Could you please help me with this. My thinking is as below. Where am I going wrong. 

Assume we have 21 bit of data. We use the MSB to select one of the DACs, the +ve or the -ve one. Then we send the remaining 20 bits to the selected DAC. Isn't that equivalent to sending 21 bits to a hypothetical 21 bit DAC? What am I missing?

I don’t think you’re missing anything, defiantboomerang.

Shadorne, if we denote the magnitude of the maximum possible output voltage as V, I’m envisioning that one DAC chip is controlling generation of output voltages between 0 and +V, with the other DAC chip generating 0 when a positive voltage is called for, while the other DAC is controlling generation of output voltages between 0 and -V, with the first DAC generating 0 when a negative voltage is called for. The outputs of the two DACs are then combined to create the overall output of the component. The voltage generated by each DAC would of course be quantized with 20 bit resolution, which would result in 21 bit resolution over the range from +V to -V.

Best regards,
-- Al

@almarg 

Not really. This just doubles the voltage value of each bit but it keeps the same resolution in terms as of number of bits or number of unique digital values available.

@defiantboomerang  

What you propose is indeed 21 bit. 20 bits from the two DACs each and an additional one bit MSB logic chip which controls whether the two DACs are additive or only one is turned on. This is not the same as balanced where both chips are operating simultaneously and are always on. 

I would call this a hybrid DAC - in fact using this topology you could take eight 16 bit DACs and couple them together with an 8 bit logic chip to create a 24 bit DAC.

Curious what, if anything, is wrong with my suggestion to pose the question to Schiit.