That's what I think. If error correction works and there is no jitter I don't see what else can be improved in reading process.
Higher resolution can be obtained in digital filtering (think averaging)but it stops short of 20-bits because of DACs. In case of traditional DACs better resolution is not possible because of components' tolerance while in case of delta-sigma DACs better resolution is limited by timing accuracy. There are some DACs from TI that are combination of both but without any apparent benefits. DCS introduced long time ago RING DACs that bypass resistors tolerance resolution limit by shuffling constantly many (I think 5)different resitors (of the same value) to get accurate average value of given division.
SACD is a recorded byproduct od delta Sigma modulation before filtering (PWM at 2.8MHz) if I understand it correctly. It supposed be equivalent to 20bit performance at 96kHz. Notice that traditional DAC ICs got eliminated and substituted by one bit DAC (switch) and filtering.
Higher resolution can be obtained in digital filtering (think averaging)but it stops short of 20-bits because of DACs. In case of traditional DACs better resolution is not possible because of components' tolerance while in case of delta-sigma DACs better resolution is limited by timing accuracy. There are some DACs from TI that are combination of both but without any apparent benefits. DCS introduced long time ago RING DACs that bypass resistors tolerance resolution limit by shuffling constantly many (I think 5)different resitors (of the same value) to get accurate average value of given division.
SACD is a recorded byproduct od delta Sigma modulation before filtering (PWM at 2.8MHz) if I understand it correctly. It supposed be equivalent to 20bit performance at 96kHz. Notice that traditional DAC ICs got eliminated and substituted by one bit DAC (switch) and filtering.