It depends on multiple elements in the design.
The Bias point the amp runs at at idle. The speed of the output stage ( slew rate ) How long long do you hold the amp stage at a class A bias before returning to idle. There are multiple way to increase the bias but end the end it must be summed to the output to the bias circuit. We use to design analog amps for or Seismic equipment for exploration. One method is to monitor or sample the signal, it will take have multiple stages of opamps is series then compare it to a the decision point then sum the decision to the bias to increase it current and voltage p. Of the speed of the gain decision must be quick. The purpose of was the digital control of gain was to keep the ADC at 3/4 full scale. That is the point that an ADC is most linear. This works great as we would ranging the gain of 64 channels at a time. I have always found to keep it simple it the best approach. I have left off details because to in theory become complex. But it should work fine if was implemented to meet the change in bias in the correct time domain. Straight class A is is more simple of course. I always thought my Krell KSA250 was a little harsh they must have improved but it did not have dynamic biasing.