On one hand, what shall matter is the final digital to analog conversion, inside a properly designed and manufactured DAC. All those intermediate digital-to-digital converters, theoretically, shall not affect SQ.
On the other hand, I keep seeing accounts of SQ improvement after a DDC was inserted in the digital path.
Then, of course, we have posts like that on ASR regarding DDC:
https://www.audiosciencereview.com/forum/index.php?threads/do-we-need-a-ddc-or-is-it-bs.33949/page-2#post-1358738
"I’ve done extensive A/B testing and measurements with these. If properly blind tested, these didn’t make any difference with any of the DACs I tried"
What’s going on?
Upon closer look, it appears to me that most of such SQ improvement accolades come from owners of R2R DACs.
I looked at descriptions/specs/reviews of three of them, which I encountered most often in users testimonials:
https://www.denafrips.com/specs-enyo
https://www.denafrips.com/specs-pontus
https://www.denafrips.com/specs-terminator-plus
All three use "Proprietary USB Audio Solution via STM32F446 Advanced AMR Based MCU".
What is STM32F446? Here is the spec:
https://www.st.com/resource/en/datasheet/stm32f446re.pdf
What counts the most from my perspective is the CPU performance of that chip. It has one core, frequency of up to 180 MHz, and instruction efficiency of 1.25 per clock. So, it is roughly an analog of Intel Atom processor operating at 0.225 GHz. Pretty slow. The chip’s price reflects this - less than $10 per unit in quantity:
https://www.mouser.com/c/?q=STM32F446
Let’s pick some cheap contemporary oversampling DAC and see what kind of CPU it uses. For instance, S.M.S.L Sanskrit 10th MKIII, which can be purchased for $139. It uses XMOS XU-316 chip. Here’s its spec:
https://www.epsglobal.com/Media-Library/EPSGlobal/Products/files/xmos/XU316-1024-QF60B.pdf?ext=.pdf
This chip is quite a bit more advanced. It is not same yet similar to the one used in $17,500
https://www.suncoastaudio.com/products/aqua-hifi-formula-xhd-dac.
It is approximately equivalent to Intel Atom processor operating at 2.4 GHz. That is, it is over 10x more performant than the chip used by the Denafrips DACs.
Please note, I’m not discussing chips used for digital-to-analog conversion per se. The chips I discuss are used to deal with USB protocol, and to presumably implement First-In-First-Out (FIFO) buffer for the digital samples, enabling their subsequent re-clocking.
Could it be that the Denafrips DAC has to use a simplified FIFO buffer? Either in terms of length, responsiveness, or something else, because their CPU performance is less than 10% of that of a cheap contemporary oversampling DAC?
I tried to find measurements of the Denafrips DACs that could shed some light on that. Turns out that in Non-Over-Sampling mode (NOS), objective measurements of one of then are not exactly impressive:
https://www.audiosciencereview.com/forum/index.php?threads/review-not-so-positive-posted-of-denafrips-aries-ii.10906/
If such distortions were mostly a consequence of the DAC architecture with not overly precise resistors used, then insertion of DDC wouldn’t likely improve things - it wouldn’t affect resistors.
Since the DDC insertion does improve things, there is a reason to believe that the excessive jitter caused by the limited FIFO implementation might be at play. Or perhaps something else related to timing precision.
If this hypothesis is correct, than the DDC effectively adds a good implementation of FIFO in front of the DAC, thus ameliorating the DAC’s FIFO imperfection. Please note that this is just a hypothesis. Would like to hear your opinions about this.