auxinput
The slew rate is determined by typically two parameters (simplistically); the driver circuit bias current, and the Cob of all the collective (bipolar) power transistors the driver is coupled to. Think of it as the bias current being the water flow from a hose and the capacitance being an empty bucket. The higher the bias, the higher the water flow. The bigger the bucket, the larger the collective parallel capacitance. The slew rate is determined by how fast the bucket fills with water from the hose. So, you can have a larger collective capacitance (ie more power transistors) if you have a high class A bias current in the driver stage, which can still give you an acceptable slew rate. So just counting the number of transistors in an output stage is insufficient for comparison. The type of transistor also makes a difference, as the Cob is generally lower for very high frequency transistors, but they typically have lower max current ratings so you need more of them for a given power. Also, you need consider whether the design uses a bridge type configuration (which is actually TWO amplifiers in a channel, inverted in phase) which will give you double the power transistors without the slew rate limitations.
Regarding offset voltages, in a power amp built from discrete transistors, the DC offset is not just determined by the input stage, as you seem to assume. If left open loop with no feedback, you will find the total DC offset may be due to unbalanced bias currents in the driver stages, for example. This may also be true for Op-amps as well, but engineers are commonly used to "reflecting" the net offset to the input stage when the op amp is closed loop with a net gain of 1. So many think all the offset voltage is due to the input stage when actually it is not. This is mathematical abstraction so that a real op amp can be compared to the hypothetical "ideal" op amp. So I return to my original point, which is that DC offset in a power amp has little to due with the type of transistor used, but is more design dependent. In another example, some power amp designs use inter-stage coupling capacitors which remove any DC offset, at the expense of adding a coupling cap in the amplification line. Op amps NEVER use inter-stage coupling caps, primarily because you cannot build capacitors of sufficient quality and size on a monolithic integrated circuit die; and because most industrial applications require op amps with DC gain. Audio amps require only AC gain.
The slew rate is determined by typically two parameters (simplistically); the driver circuit bias current, and the Cob of all the collective (bipolar) power transistors the driver is coupled to. Think of it as the bias current being the water flow from a hose and the capacitance being an empty bucket. The higher the bias, the higher the water flow. The bigger the bucket, the larger the collective parallel capacitance. The slew rate is determined by how fast the bucket fills with water from the hose. So, you can have a larger collective capacitance (ie more power transistors) if you have a high class A bias current in the driver stage, which can still give you an acceptable slew rate. So just counting the number of transistors in an output stage is insufficient for comparison. The type of transistor also makes a difference, as the Cob is generally lower for very high frequency transistors, but they typically have lower max current ratings so you need more of them for a given power. Also, you need consider whether the design uses a bridge type configuration (which is actually TWO amplifiers in a channel, inverted in phase) which will give you double the power transistors without the slew rate limitations.
Regarding offset voltages, in a power amp built from discrete transistors, the DC offset is not just determined by the input stage, as you seem to assume. If left open loop with no feedback, you will find the total DC offset may be due to unbalanced bias currents in the driver stages, for example. This may also be true for Op-amps as well, but engineers are commonly used to "reflecting" the net offset to the input stage when the op amp is closed loop with a net gain of 1. So many think all the offset voltage is due to the input stage when actually it is not. This is mathematical abstraction so that a real op amp can be compared to the hypothetical "ideal" op amp. So I return to my original point, which is that DC offset in a power amp has little to due with the type of transistor used, but is more design dependent. In another example, some power amp designs use inter-stage coupling capacitors which remove any DC offset, at the expense of adding a coupling cap in the amplification line. Op amps NEVER use inter-stage coupling caps, primarily because you cannot build capacitors of sufficient quality and size on a monolithic integrated circuit die; and because most industrial applications require op amps with DC gain. Audio amps require only AC gain.