I am not an EE, but even I can see that Uptown audio white paper assumes incompetence on the part of designers, and ignorance on the part of readers.
- They could easily show this with measurements if true
- They are still sending data via USB, so this phase-noise overlay will still occur.
- I have sat in enough PCB design reviews, and been involved in enough IC design to know their claims of ground plane noise can be effectively reduced, obviously based on product measurements, to a level where it is not a limiting factor. In terms of the impact on timing inside an IC or product it is a factor of transition time of the clock edge through metastable bounds. With fast edges, power supply / ground noise is going to have limited impact.
It is easy to type something on a keyboard and claim it is true as Uptown has done. But as Charles Hitchens said, that which can be asserted without evidence can be dismissed without evidence. On the other hand, you will find many a discussion on the web about clock integrity in noisy environments including impact on jitter.