02-14-13: EdorrGood comment; good question. I suspect that one reason a transport can still make a difference if the data is completely reclocked is that digital noise associated with the low-to-high and high-to-low transitions (i.e., the risetimes and falltimes) of the signal that is received from the transport can to some degree couple past the buffer circuitry and contribute to jitter at the point where D/A conversion is performed. The coupling occurring via grounds, stray capacitances, and other possible paths through the circuitry.
Very much a function of the overall architecture. With reclocking and asynchronous DACs, the difference are definitely a lot smaller then with a traditional synchronous architecture. It is still a bit of a mystery to me why a transport would make any difference if the bits are fed into a buffer and then completely reclocked, but I guess they still do.
The magnitude and character of that kind of effect figures to be dependent on unspecified and/or unspecifiable design characteristics of both components, and also the interconnect cable, and to not have a great deal of predictability.
Regards,
-- Al