solid state vs tubes

Atmasphere, could you please elaborate on these; "...non-linearities caused by capacitive elements in the junctions of the output devices."?

Atmo::
When I have a mosfet device under test, what parameter am I looking for?
Under what conditions will I be able to measure this parameter?

The 'capacitive' element of a mosfet would be 2 conductors, separated by an insulator. Now, the drain, source and gate will all have resistence associated with them and the gate oxide, usually pretty thin.....on the order of angstroms, is capacitive but how much? in the nano farads, for sure.
Their doesn't appear to be much capacitance between source and drain since they are both just differently doped regions of the substrate, except in International Rectifier HexFet devices.....(of which Carver was a big fan)
Even the devices I'm used to building, in which the drain is on the bottom of the device have no capacitive elements, again, except the gate oxide.

just curious...........Instead of magfan, you can call me FabGuy.

http://www.irf.com/technical-info/appnotes/mosfet.pdf

Capacitive turnon / turnoff delay.....that seems to be the issue.....
However, In a device with VERY thin gate ox......How much capactance are we actually talking about?

I never even heard the test guys talk about this.....

Fabguy do u need a hp4062ux to test at wafer probe?

I'm not a probe guy. i spent about 30 years making both ICs and discrete.
I am most familiar with probe parametrics as they apply to my area of specialty.

As for probers, I know they weren't HP. The last ones I remember were some kind of european 4 station from one central computer/data gatherer. Individual histograms of each wafer were stored for later analysis...patterns of failure and such. I avoided probe....looked too much like work.
I am much more comfortable with diffusion / implant / metalization and was very good at metrology. Nanometrics equipement, surface profile stuff and elipsometer along with various 4pt probe and specialty tools.