Parallel Capacitors-Theoretical Question


I want to replace the capacitors in my speaker's crossover networks. My Large Advent's came stock with 13uf NPE's which I would like to replace with PIO caps. Unfortunately, PIO caps are unavailable in that value. What's the best way to get to 13uf, (12uf + 1uf) or (6uf + 7uf)?
This is a purely theoretical question and I realize either method would probably sound the same, but I'm wondering if there is a reason why one method would be preferred over the other. Are there phase, impedance or other issues associated with either method. I realize of course that I could simply use 12uf or 15uf and probably never notice anything given that the original 13uf NPE had a 20% tolerance, but in theory, what's the best way and why?
heyraz
I gather that the results of adding bypass caps are unpredictable. Some reviewers (Auw Jimmy, Jon L. & Tony Gee) make the analogy of usng spices in cooking. They experiment until they hit upon a sound flavor they like.
I was really trying to get away from experimentation, it gets too costly. I realized that after rolling op-amps into my phono preamp recently. Before I knew it, I had spent nearly $300.
Capacitors are a bit more complex I think. There are more issues than their face value that can affect them. For example, Mundorf interleaves their capacitor's windings to cancel inductance. After I read that, I wasn't sure what might happen with 2 caps in parallel. Would they induce each other and do strange things at a particular frequency? There's also ESR to consider.
Although I realize many designers make their component choices from an economic standpoint, I still respect those choices as being the best available at the time to get the job done. After all, isn't engineering the art of compromise? That's why I wanted to keep the 13uf value, or get as close to it without causing other problems. It would therefore seem that a good 12 uf capacitor would be the place to start, maybe add 1uf to see how it changes things, and maybe add a bypass 0.1mf after that.
Thanks for your help guys. If anybody's interested in the final result, contact my email and leave me a message.
Al shouldn't the tolerances for cap add in quadrature? (0.1^2 + 0.1^2)^0.5 = 0.14 or 14%?

kind of ticky tack, sorry. I'm more curious and electronics are not my field.
03-22-11: Paulsax
Shouldn't the tolerances for cap add in quadrature? (0.1^2 + 0.1^2)^0.5 = 0.14 or 14%?
Hi Paul,

You ask a good question, as usual.

If the two tolerances are the same in percentage terms, then as I stated the tolerance of the parallel combination will be that same percentage. That can be seen by calculating the worst case values. For example, if a 10uF 10% capacitor is paralleled with a 5uF 10% capacitor, the minimum possible value of the combination is 9uF + 4.5uF = 13.5uF. The maximum possible value of the combination is 11uF + 5.5uF = 16.5uF. In both cases the deviation from the nominal value of the combination (15uF), is 1.5uF, or 10%.

My statistics courses are now a (very) distant memory, but I believe that combining inaccuracies on an rss (root sum square) basis such as you described would be applicable to standard deviation and related calculations, that involve the PROBABILITY that a combined inaccuracy will fall within limits that are NARROWER than the worst-case limits.

That in turn would typically involve situations where tolerances are being combined that act on the same nominal value, not on nominal values that sum together.

Best regards,
-- Al