@roestano
Digital is digital. Bits are bits. So you dont need to worry about noise if you assume Devialet has built a robust device with good power supply and have separated and isolated the digital logic circuits from contaminating the DAC section (this can occur through a shared power supply or mere proximity of circuits). The only complication with audio is the timing signal. This timing problem (jitter) is well understood and modern equipmemt should function asynchronously which means the jitter clock is ignored. If you are providing ethernet to the DAC then your DAC is behaving like a small computer and it will not be receiving timing information over ethernet like it would with SPDIF or Toslink - so jitter will be a function of the electronics and clock stability of the Devialet itself. The Devialet should not care about the path of how the ethernet signal reaches it - so upstream digital devices should have no effect at all (apart from contamination of the house AC power from SMPS supply and which Devialet should be designed to cope with.
Digital is digital. Bits are bits. So you dont need to worry about noise if you assume Devialet has built a robust device with good power supply and have separated and isolated the digital logic circuits from contaminating the DAC section (this can occur through a shared power supply or mere proximity of circuits). The only complication with audio is the timing signal. This timing problem (jitter) is well understood and modern equipmemt should function asynchronously which means the jitter clock is ignored. If you are providing ethernet to the DAC then your DAC is behaving like a small computer and it will not be receiving timing information over ethernet like it would with SPDIF or Toslink - so jitter will be a function of the electronics and clock stability of the Devialet itself. The Devialet should not care about the path of how the ethernet signal reaches it - so upstream digital devices should have no effect at all (apart from contamination of the house AC power from SMPS supply and which Devialet should be designed to cope with.