Jitter and clock phase noise are different ways of quantifying the same phenomenon. Jitter is measurement in time, phase noise is in frequency.
Mathematically the relationship is quantified so engineers designing digital components, DACs, ADCs can filter the jitter/phase noise. Modern DACs even cheap ones do a good job of this. Of course this is information in the packets it has nothing to do with the clock in the ethernet wire, once the packet arrives that timing is gone the packets are then in memory. Only the clock embedded in the signal works with the DACs clock.
this is not about "jitter reduction". It is about reducing leakage (both high-impedance and low-impedance) and reducing clock phase-noise.