I would like to add to comparison between PLL and reclocker that reclocker does not replace PLL but works in addition. Any timing imperfections left by reclocker will be further repaired by PLL.
Any upsampling DAC will reclock the data using a PLL generated clock. The PLL has natural jitter reduction. I’m not sure that adding another jitter reduction device would help much. Most jitter reduction circuits are probably just using PLL reclocking anyway.Jitter reduction circuitry used in reclockers, like REMEDY, is not based on PLL but rather on Asynchronous Rate Converter (does not use PLL). PLLs have limitations. Since based on phase comparison they can actually amplify phase noise of the reference clock. The best scheme IMHO, that is both bit perfect and performance limited only by the quality of the internal reference clock is Asynchronous USB DAC.